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Raw packets – SR8ULZ-1

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Found 131 packets. 0.001 packets/s on average over 171005 s. Query took 0.025 s.

2026-10-30 22:04:19 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"2#H"'"%!!!!|
2026-10-30 21:34:18 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"1#F"&"$!!!!|
2026-10-30 21:04:18 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"0#D"%"#!!!!|
2026-10-30 20:34:17 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"/#B"$""!!!!|
2026-10-30 20:04:17 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|".#@"#"!!!!!|
2026-10-30 19:34:16 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"-#>""!{!!!!|
2026-10-30 19:04:16 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|",#<"!!z!!!!|
2026-10-30 18:34:16 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"+#:!{!y!!!!|
2026-10-30 18:04:14 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"*#8!z!x!!!!|
2026-10-30 17:34:13 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|")#6!y!w!!!!|
2026-10-30 17:04:13 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|"(#4!x!v!!!!|
2026-10-30 17:04:12 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:>System booted W2 TX&RX 434.855MHz 1200bps
2026-10-30 17:04:11 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :EQNS.0,1,0,0,1,0,0,1,0,0,0.01,0,0,0.02,0
2026-10-30 17:04:07 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :UNIT.Count,Count,Count,VDC,VDC
2026-10-30 17:04:04 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :PARM.TX,RX,Digi,V_Bat,V_Ext
2026-10-30 17:04:02 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:>Scheduled Reboot
2026-10-30 16:34:19 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*Q#.!w!u!!!!|
2026-10-30 16:04:18 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*P#,!v!t!!!!|
2026-10-30 15:34:18 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*O#*!u!s!!!!|
2026-10-30 15:04:17 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*N#(!t!r!!!!|
2026-10-30 13:04:15 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*J"{!o!n!!!!|
2026-10-30 12:34:14 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*I"y!n!m!!!!|
2026-10-30 12:04:13 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*H"w!l!l!!!!|
2026-10-30 11:34:13 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*G"u!k!k!!!!|
2026-10-30 11:04:12 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|*F"s!j!j!!!!|
2026-10-30 11:04:11 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:>System booted W2 TX&RX 434.855MHz 1200bps
2026-10-30 11:04:10 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :EQNS.0,1,0,0,1,0,0,1,0,0,0.01,0,0,0.02,0
2026-10-30 11:04:06 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :UNIT.Count,Count,Count,VDC,VDC
2026-10-30 11:04:03 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :PARM.TX,RX,Digi,V_Bat,V_Ext
2026-10-30 11:04:01 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:>Scheduled Reboot
2026-10-30 10:34:18 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(a"m!i!i!!!!|
2026-10-30 10:04:17 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(`"k!h!h!!!!|
2026-10-30 09:34:17 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(_"i!g!g!!!!|
2026-10-30 09:04:16 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(^"g!f!f!!!!|
2026-10-30 08:34:16 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(]"e!e!e!!!!|
2026-10-30 08:04:15 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(\"c!d!d!!!!|
2026-10-30 07:34:14 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(["a!c!c!!!!|
2026-10-30 07:04:14 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(Z"_!b!b!!!!|
2026-10-30 06:34:13 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(Y"]!a!a!!!!|
2026-10-30 06:04:13 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(X"[!`!`!!!!|
2026-10-30 05:34:12 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(W"Y!_!_!!!!|
2026-10-30 05:04:11 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:>System booted W2 TX&RX 434.855MHz 1200bps
2026-10-30 05:04:09 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :EQNS.0,1,0,0,1,0,0,1,0,0,0.01,0,0,0.02,0
2026-10-30 05:04:06 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :UNIT.Count,Count,Count,VDC,VDC
2026-10-30 05:04:02 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10::SR8ULZ-1 :PARM.TX,RX,Digi,V_Bat,V_Ext
2026-10-30 05:04:00 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:>Scheduled Reboot
2026-10-30 04:34:18 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(f"Q!]!]!!!!|
2026-10-30 04:04:17 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(e"O!\!\!!!!|
2026-10-30 03:34:17 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(d"M![![!!!!|
2026-10-30 03:04:16 UTC: SR8ULZ-1>APLRFD,WIDE2-1,qAR,SQ5LTL-10:!L4FfqT(E"# GLoRa APRS Digi Ulez|(c"K!Z!Z!!!!|

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